Tag Archives: Xilinx
Open-source FPGA Stereo Vision Core released
The first version of my open-source OpenCV–compatible FPGA Stereo Correspondence Core is now available! (have a look at my previous FPGA Stereo Vision Project post for some more context) It’s written purely in synthesizable Verilog, and uses device-agnostic inference for … Continue reading
FPGA Stereo Vision Project
As alluded to in a few of my other posts, I’m working on developing an open-source FPGA-accelerated vision platform. This post is a detailed overview of the project’s architecture and general development methodology. Future (and past) posts will elaborate on … Continue reading
Spartan-6 BGA test board
Eventually, when my FPGA stereo-vision project nears its terminus, I’m going to want to produce a refined sensor board that combines the image sensors and FPGA onto a single board. In preparation for that, this board is a test vehicle … Continue reading
Posted in FPGAs, Microcontrollers, PCBs, Technical
Tagged BGA, EAGLE, FPGA, microcontroller, PCB, Spartan-6, Xilinx
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FMC-LPC to SATA adapter board
I recently bought a shiny new Xilinx Spartan-6 FPGA SP605 Evaluation Kit: It’s an excellent board (aside from the ridiculous ~10W idle power consumption and the corresponding supply heating/temperature) – PCI-Express, gigabit ethernet, DVI, 1.6 GB/s 128 MB DDR3, and … Continue reading
Inferring true dual-port, dual-clock RAMs in Xilinx and Altera FPGAs
Yes, it’s actually possible! – in Verilog and VHDL, even. I’m a big fan of inference, especially as it applies to writing synthesizable Verilog code for FPGAs. Properly coded, a module that infers technology-dependent blocks (e.g. block RAMs) should: be … Continue reading
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