Daniel Strother — Electrical Engineer

dan.strother@gmail.comhttps://danstrother.com/ — Pittsburgh, PA

Skilled multidisciplinary electrical engineer with intuitive understanding of complex electrical, software, and mechanical systems. Specialties include: high-speed FPGA/ASIC design, architecture, and simulation/verification; embedded microcontrollers and firmware; and, schematic and PCB design/layout.

Work Experience

Senior Engineer – Pittsburgh, PA – February 2012 to Present

Carnegie Robotics LLC

  • Robots!
Electrical Engineer – Vancouver, WA – June 2007 to January 2012

Hewlett Packard

  • Digital ASIC Emulation Engineer
    • Member of a small team responsible for designing and supporting an FPGA-based ASIC emulation platform used for verification and early firmware development for HP’s custom Inkjet Printer control ASICs.
    • Supported hardware emulator platform consisting of six Virtex-4 FPGAs on a custom 24-layer PCB.
    • Partitioned and synthesized Verilog and VHDL RTL code for an entire ASIC design into multiple FPGAs.
    • Specified and designed new PCBs to extend emulator’s functionality to support validation of new ASIC features (e.g. PCIe and proprietary LVDS links).
    • Developed custom FPGA-targeted IP for efficiently multiplexing/serializing multiple AXI buses between FPGAs using limited PCB interconnect.
    • Specified and architected next-generation Virtex-6 based emulation platform.
    • Trained/mentored new emulation team members.
  • Digital ASIC Design Engineer
    • Designed and verified new ASIC block for real-time hardware decompression of proprietary run-length-encoded image format. Block was verified using directed test and SystemVerilog constrained-random test-bench. The block was integrated into an existing high-performance imaging pipeline.
    • Debugged multiple PCI-Express bus issues encountered during ASIC bring-up, and proposed novel firmware workarounds for identified issues.
  • Electrical Engineer
    • Developed FPGA prototypes for other engineering teams, including: a quadrature-encoder resolution divider for interfacing high-resolution sensors to existing hardware systems; and an LVDS data stream demultiplexer for driving multiple serialized LVDS channels from a single ASIC channel.
    • Created cost-saving real-time-clock alternative using low-power PIC microcontroller.
Intern – Pasadena, CA – June 2006 to August 2006

Jet Propulsion Laboratory

  • Worked on JPL’s 2nd-generation Airborne Precipitation Radar (APR-2).
  • Developed simulation models of APR-2’s FPGA-based DSP engine using C and MATLAB.
  • Used models to root-cause source of anomalous errors in radar’s output.
Intern – Pullman, WA – June 2005 to January 2006

Digilent Inc.

  • Specified, designed and implemented control firmware for Atmel AVR microcontroller based designs.
  • Wrote firmware for 12-channel R/C servo driver with 3 serial interfaces, binary and plain-text protocols.
Student – Pullman, WA – September 2004 to May 2007

Robotics Club at Washington State University

  • Lead EE on “Eddie” – a Mars-rover inspired autonomous 6-wheeled rocker-bogie style robot.
  • Developed custom 12-channel motor controller with closed-loop PID control and I2C bus.
  • Designed sensor systems with electronic compass, ultrasonic distance sensors, touch sensors, and pan/tilt camera.
  • Created fault-tolerant communications protocols for I2C bus and host-computer serial interface.
  • Developed control firmware and low-level driver software in C and C++.


Washington State University – Pullman, WA – August 2004 to May 2007

B.S. Electrical Engineering

  • Emphasis on embedded digital systems, with elective course-work in: digital logic design, microprocessor and computer architecture, digital signal processing, digital communications systems, and control systems.
  • 3.81 GPA within BSEE program (3.73 overall); Minor in Computer Engineering.

Independent Projects

  • FPGA-accelerated stereo-vision
    Actively developing an open-source FPGA-based vision platform consisting of modular synthesizable Verilog blocks for camera interfacing, image rectification, stereo-correspondence, post-processing, DRAM interfacing, and PCIe interfacing; developed multiple custom PCBs for interfacing with Aptina image sensors and Xilinx Spartan-6 FPGAs.
  • Reflow oven controller
    Converted a toaster-oven into a reflow soldering oven, using an AVR microcontroller, thermocouples, and solid-state relays; developed graphical control interface for oven in Python and QT; designed and tuned PID control loop using simulated system in Python.
  • Real-world Verilog interface
    Developed Verilog PLI/VPI module to interface Icarus Verilog simulator with external hardware via a USB microcontroller; allows for existing simulation to transparently interact with real-world HW.
  • Brushless motor controller
    Designed schematic, firmware, and custom PCB for 3-phase brushless DC motor controller, featuring: discrete MOSFET bridges, per-phase current and voltage sensing, on-board switch-mode power supply, CAN and RS-422 interfaces, and 32-bit ARM microcontroller.
  • FPGA NES clone
    Cloned a complete Nintendo Entertainment System in an FPGA, including: development of custom tile/sprite-based graphics processing module, and integration of soft-core 6502 CPU.
  • Tesla Coils
    Built high-frequency coils with various primary-side topologies, including: synchronous rotary spark-gap switched, multi-KW solid-state H-bridge driven, and even vacuum-tube modulated primaries. Solid-state designs used VCOs and PLLs with RF and current-based feedback to dynamically track system’s resonant frequency under load.



  • Schematic capture (Mentor, Cadence, EAGLE)
  • PCB layout (EAGLE); PCB assembly
  • High-speed: LVDS, DRAM
  • High-power: motor controllers, switch-mode power supplies, high-voltage H-bridges
  • Low-power: sleep/standby, power-gating
  • Debug: oscilloscopes and logic-analyzers
  • Simulation (SPICE)


  • Atmel AVR, Microchip PIC, ARM
  • C, assembly
  • Hardware peripherals: timers/PWM, interrupts, ADCs, DACs, DMA, UART/SPI/I2C
  • Fixed-point integer algorithms; Interrupt-driven processing


  • OSs: Windows, Linux (Debian/Ubuntu)
  • Office: Microsoft Office, OpenOffice
  • Mech: CAD/CAM (SolidWorks), machine tools, CNC
  • Web design: HTML, CSS, PHP, SQL, Javascript


  • FPGAs: Xilinx, Altera
  • HDLs: Verilog, VHDL
  • HVLs: SystemVerilog, SystemC
  • Verification methodologies:
    • Directed test; Constrained-random
    • Transactors/bus-functional-models
    • Code coverage
    • HW/SW co-verification
  • High-frequency design:
    • Pipelined logic; Critical-path optimization
    • Floor-planning
    • Device-primitive/netlist-based design
  • High-speed interfaces:
    • LVDS/SerDes; PCIe
    • DDR DRAM
    • AMBA-AXI
  • Soft-core CPUs


  • C, C++, Perl, Python, MATLAB; Qt GUI framework
  • Multi-threading; Non-blocking/asynchronous I/O
  • Networking (sockets, packets/streams, UDP/TCP)
  • Drivers