<?xml version="1.0" encoding="UTF-8"?><rss version="2.0"
	xmlns:content="http://purl.org/rss/1.0/modules/content/"
	xmlns:dc="http://purl.org/dc/elements/1.1/"
	xmlns:atom="http://www.w3.org/2005/Atom"
	xmlns:sy="http://purl.org/rss/1.0/modules/syndication/"
	xmlns:georss="http://www.georss.org/georss" xmlns:geo="http://www.w3.org/2003/01/geo/wgs84_pos#" xmlns:media="http://search.yahoo.com/mrss/"
		>
<channel>
	<title>Comments for danstrother.com</title>
	<atom:link href="http://danstrother.com/comments/feed/" rel="self" type="application/rss+xml" />
	<link>http://danstrother.com</link>
	<description>robots, fpgas, tesla coils, photography, etcetera</description>
	<lastBuildDate>Wed, 25 Apr 2012 10:42:07 +0000</lastBuildDate>
	<sy:updatePeriod>hourly</sy:updatePeriod>
	<sy:updateFrequency>1</sy:updateFrequency>
	<generator>http://wordpress.com/</generator>
	<item>
		<title>Comment on MT9V032 LVDS camera board by Logan</title>
		<link>http://danstrother.com/2011/01/14/mt9v032-lvds-camera-board/#comment-983</link>
		<dc:creator><![CDATA[Logan]]></dc:creator>
		<pubDate>Wed, 25 Apr 2012 10:42:07 +0000</pubDate>
		<guid isPermaLink="false">http://danstrother.com/?p=548#comment-983</guid>
		<description><![CDATA[Hey Gary I am newer to sensors and doing something similar using the Xilinx Spartan-3a instead of the Xilinx SP601. Is there any chance that you would be willing to share your VHDL code so I could compare it to mine because I am working on fixing the grouping problem as well?]]></description>
		<content:encoded><![CDATA[<p>Hey Gary I am newer to sensors and doing something similar using the Xilinx Spartan-3a instead of the Xilinx SP601. Is there any chance that you would be willing to share your VHDL code so I could compare it to mine because I am working on fixing the grouping problem as well?</p>
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		<title>Comment on Spartan-6 BGA test board by ryankbrooks</title>
		<link>http://danstrother.com/2011/01/16/spartan-6-bga-test-board/#comment-963</link>
		<dc:creator><![CDATA[ryankbrooks]]></dc:creator>
		<pubDate>Wed, 18 Apr 2012 03:07:00 +0000</pubDate>
		<guid isPermaLink="false">http://danstrother.com/?p=577#comment-963</guid>
		<description><![CDATA[How did this turn out?  Curious about the DD2 interface turned out, as I&#039;m about to attempt the same thing on a four layer board, at home.  Thanks!]]></description>
		<content:encoded><![CDATA[<p>How did this turn out?  Curious about the DD2 interface turned out, as I&#8217;m about to attempt the same thing on a four layer board, at home.  Thanks!</p>
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	</item>
	<item>
		<title>Comment on FPGA Stereo Vision Project by Very interesting things for Stereo Vision &#124; Julian&#039;s</title>
		<link>http://danstrother.com/2011/01/24/fpga-stereo-vision-project/#comment-959</link>
		<dc:creator><![CDATA[Very interesting things for Stereo Vision &#124; Julian&#039;s]]></dc:creator>
		<pubDate>Tue, 17 Apr 2012 16:13:15 +0000</pubDate>
		<guid isPermaLink="false">http://danstrother.com/?p=588#comment-959</guid>
		<description><![CDATA[[...] http://danstrother.com/2011/01/24/fpga-stereo-vision-project/ [...]]]></description>
		<content:encoded><![CDATA[<p>[...] <a href="http://danstrother.com/2011/01/24/fpga-stereo-vision-project/" rel="nofollow">http://danstrother.com/2011/01/24/fpga-stereo-vision-project/</a> [...]</p>
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		<title>Comment on Open-source FPGA Stereo Vision Core released by Brent</title>
		<link>http://danstrother.com/2011/06/10/fpga-stereo-vision-core-released/#comment-915</link>
		<dc:creator><![CDATA[Brent]]></dc:creator>
		<pubDate>Mon, 26 Mar 2012 21:19:51 +0000</pubDate>
		<guid isPermaLink="false">http://danstrother.com/?p=698#comment-915</guid>
		<description><![CDATA[Hello Dan,
Thank you for sharing your project. I am just curious but what software are you using to draw those diagrams? They look nice!]]></description>
		<content:encoded><![CDATA[<p>Hello Dan,<br />
Thank you for sharing your project. I am just curious but what software are you using to draw those diagrams? They look nice!</p>
]]></content:encoded>
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		<title>Comment on Inferring true dual-port, dual-clock RAMs in Xilinx and Altera FPGAs by yogesh</title>
		<link>http://danstrother.com/2010/09/11/inferring-rams-in-fpgas/#comment-908</link>
		<dc:creator><![CDATA[yogesh]]></dc:creator>
		<pubDate>Tue, 20 Mar 2012 21:35:57 +0000</pubDate>
		<guid isPermaLink="false">http://danstrother.com/?p=482#comment-908</guid>
		<description><![CDATA[How can one use &quot;reset&quot; implementation using the shared variable to clear the memory contents for the dual port?]]></description>
		<content:encoded><![CDATA[<p>How can one use &#8220;reset&#8221; implementation using the shared variable to clear the memory contents for the dual port?</p>
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	</item>
	<item>
		<title>Comment on Reflow oven controller by David</title>
		<link>http://danstrother.com/2011/01/15/reflow-oven-controller/#comment-903</link>
		<dc:creator><![CDATA[David]]></dc:creator>
		<pubDate>Fri, 16 Mar 2012 02:26:14 +0000</pubDate>
		<guid isPermaLink="false">http://danstrother.com/?p=560#comment-903</guid>
		<description><![CDATA[Any chance of getting your simulator posted as well.  I&#039;m trying to work up something and just really not having any luck getting anything like reasonable results.]]></description>
		<content:encoded><![CDATA[<p>Any chance of getting your simulator posted as well.  I&#8217;m trying to work up something and just really not having any luck getting anything like reasonable results.</p>
]]></content:encoded>
	</item>
	<item>
		<title>Comment on Inferring true dual-port, dual-clock RAMs in Xilinx and Altera FPGAs by Hagen</title>
		<link>http://danstrother.com/2010/09/11/inferring-rams-in-fpgas/#comment-885</link>
		<dc:creator><![CDATA[Hagen]]></dc:creator>
		<pubDate>Tue, 06 Mar 2012 22:53:57 +0000</pubDate>
		<guid isPermaLink="false">http://danstrother.com/?p=482#comment-885</guid>
		<description><![CDATA[Excellent work, Dan. I was hooking up a VGA module to the JupiterACE from ZXGATE on the Papilio, got it to work but still have some sync problems -- dual ported RAM will likely solve the issue. It&#039;s nice to see that it&#039;s possible to infer the BRAMs in a portable way, and also to read about some of the caveats.. Many thanks for the hours you put into this, and even more thanks for actually sharing it! :-)]]></description>
		<content:encoded><![CDATA[<p>Excellent work, Dan. I was hooking up a VGA module to the JupiterACE from ZXGATE on the Papilio, got it to work but still have some sync problems &#8212; dual ported RAM will likely solve the issue. It&#8217;s nice to see that it&#8217;s possible to infer the BRAMs in a portable way, and also to read about some of the caveats.. Many thanks for the hours you put into this, and even more thanks for actually sharing it! :-)</p>
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	<item>
		<title>Comment on FMC-LPC to SATA adapter board by Pavan</title>
		<link>http://danstrother.com/2010/12/04/fmc-lpc-to-sata-adapter-board/#comment-870</link>
		<dc:creator><![CDATA[Pavan]]></dc:creator>
		<pubDate>Wed, 29 Feb 2012 19:01:08 +0000</pubDate>
		<guid isPermaLink="false">http://danstrother.com/?p=518#comment-870</guid>
		<description><![CDATA[Also, could you tell me where you got your FMC-LPC to SATA PCB fabricated?

thanks]]></description>
		<content:encoded><![CDATA[<p>Also, could you tell me where you got your FMC-LPC to SATA PCB fabricated?</p>
<p>thanks</p>
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	<item>
		<title>Comment on FMC-LPC to SATA adapter board by Pavan</title>
		<link>http://danstrother.com/2010/12/04/fmc-lpc-to-sata-adapter-board/#comment-864</link>
		<dc:creator><![CDATA[Pavan]]></dc:creator>
		<pubDate>Thu, 23 Feb 2012 21:56:28 +0000</pubDate>
		<guid isPermaLink="false">http://danstrother.com/?p=518#comment-864</guid>
		<description><![CDATA[This is really helpful for me as I am also trying to make FMC adapters for our application. It would be really nice if you can point me to the place where you got FMC-LPC library, I need the same for FMC-HPC connector that comes on Xilinx ML605 boards.

thanks]]></description>
		<content:encoded><![CDATA[<p>This is really helpful for me as I am also trying to make FMC adapters for our application. It would be really nice if you can point me to the place where you got FMC-LPC library, I need the same for FMC-HPC connector that comes on Xilinx ML605 boards.</p>
<p>thanks</p>
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	</item>
	<item>
		<title>Comment on Brushless DC motor controller board by TC</title>
		<link>http://danstrother.com/2011/01/12/brushless-dc-motor-controller-board/#comment-833</link>
		<dc:creator><![CDATA[TC]]></dc:creator>
		<pubDate>Thu, 02 Feb 2012 14:50:04 +0000</pubDate>
		<guid isPermaLink="false">http://danstrother.com/?p=537#comment-833</guid>
		<description><![CDATA[Dan,

Thank you very much for posting your design!  I was wondering if you had a partlist including the large capacitor at the input.  I am trying to do the same thing but will be using NI&#039;s RIO FPGA system as the controller to provide versatility thus I am just trying to replicate the driver portion.  I think I have most of the components identified but want to make sure.  In addition I am a ME with a slight background in circuitry but wasn&#039;t sure of the reasoning for the C38 through C51 capacitors in parrallel vs using just one and how do you use the multiple signals to calculate the current?]]></description>
		<content:encoded><![CDATA[<p>Dan,</p>
<p>Thank you very much for posting your design!  I was wondering if you had a partlist including the large capacitor at the input.  I am trying to do the same thing but will be using NI&#8217;s RIO FPGA system as the controller to provide versatility thus I am just trying to replicate the driver portion.  I think I have most of the components identified but want to make sure.  In addition I am a ME with a slight background in circuitry but wasn&#8217;t sure of the reasoning for the C38 through C51 capacitors in parrallel vs using just one and how do you use the multiple signals to calculate the current?</p>
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	</item>
</channel>
</rss>

